MAX1989MUE+【PDF 13/17 页】IC TEMP SENSOR REMOTE 16TSSOP

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Sheet目录42

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Multichannel Remote/Local

Temperature Sensors

______________________________________________________________________________________ 13

Manufacturer and Device

ID Codes

Two ROM registers provide manufacturer and device

ID codes. Reading the manufacturer ID returns 4Dh,

which is the ASCII code M (for Maxim). Reading the

device ID returns 03h for MAX1668, 05h for MAX1805,

and 0Bh for MAX1989. If the read word 16-bit SMBus

protocol is employed (rather than the 8-bit Read Byte),

the least significant byte contains the data and the most

significant byte contains 00h in both cases.

Configuration Byte Functions

The configuration byte register (Table 5) is used to

mask (disable) interrupts and to put the device in soft-

ware standby mode.

Status Byte Functions

The two status byte registers (Tables 6 and 7) indicate

which (if any) temperature thresholds have been

exceeded. The first byte also indicates whether the

ADC is converting and whether there is an open circuit

in a remote-diode DXP_ to DXN_ path. After POR, the

normal state of all the flag bits is zero, assuming none

of the alarm conditions are present. The status byte is

cleared by any successful read of the status byte,

unless the fault persists. Note that the ALERT interrupt

latch is not automatically cleared when the status flag

bit is cleared.

When reading the status byte, you must check for inter-

nal bus collisions caused by asynchronous ADC timing,

or else disable the ADC prior to reading the status byte

(through the RUN/STOP bit in the configuration byte).

To check for internal bus collisions, read the status

byte. If the least significant 7 bits are ones, discard the

data and read the status byte again. The status bits

LHIGH, LLOW, RHIGH, and RLOW are refreshed on the

SMBus clock edge immediately following the stop con-

dition, so there is no danger of losing temperature-relat-

ed status data as a result of an internal bus collision.

The OPEN status bit (diode continuity fault) is only

refreshed at the beginning of a conversion, so OPEN

data is lost. The ALERT interrupt latch is independent of

the status byte register, so no false alerts are generated

by an internal bus collision.

If the THIGH and TLOW limits are close together, its

possible for both high-temp and low-temp status bits to

be set, depending on the amount of time between sta-

tus read operations (especially when converting at the

fastest rate). In these circumstances, its best not to rely

on the status bits to indicate reversals in long-term tem-

perature changes and instead use a current tempera-

ture reading to establish the trend direction.

Conversion Rate

The MAX1668/MAX1805/MAX1989 are continuously

measuring temperature on each channel. The typical

conversion rate is approximately three conversions/s

(for both devices). The resulting data is stored in the

temperature data registers.

Slave Addresses

The MAX1668/MAX1805/MAX1989 appear to the

SMBus as one device having a common address for all

ADC channels. The device address can be set to one

of nine different values by pin-strapping ADD0 and

ADD1 so that more than one MAX1668/MAX1805/

MAX1989 can reside on the same bus without address

conflicts (Table 8).

The address pin states are checked at POR only, and

the address data stays latched to reduce quiescent

supply current due to the bias current needed for high-Z

state detection.

The MAX1668/MAX1805/MAX1989 also respond to the

SMBus alert response slave address (see the Alert

Response Address section).

POR and Undervoltage Lockout

The MAX1668/MAX1805/MAX1989 have a volatile

memory. To prevent ambiguous power-supply condi-

tions from corrupting the data in memory and causing

erratic behavior, a POR voltage detector monitors V

and clears the memory if V

falls below 1.8V (typ, see

the Electrical Characteristics table). When power is first

applied and V

rises above 1.85V (typ), the logic

blocks begin operating, although reads and writes at

levels below 3V are not recommended. A second

comparator, the ADC UVLO comparator, prevents

the ADC from converting until there is sufficient head-

room (V

= 2.8V typ).

Power-Up Defaults

" Interrupt latch is cleared.

" Address select pins are sampled.

" ADC begins converting.

" Command byte is set to 00h to facilitate quick

remote receive byte queries.

" T

HIGH

and T

LOW

registers are set to max and min

limits, respectively.

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